搜索资源列表
CY7c68013_FPGA_Read_Sram
- FPGA读SRAM中的数再传给CY7C68013
CY7c68013_fpga_write_sram
- FPGA将从CY7C68013读到的数写入SRAM
3344
- BulkIn是FPGA向CY7C68013发送数据 BulkOut是FPGA从CY7C68013接收数据-BulkIn is the FPGA to send data to the CY7C68013 CY7C68013 BulkOut is receiving data from the FPGA
fpgacy7c68013
- fpga 与usb 芯片cy7c68013的doc文档,用的是slavefifo方式-fpga with usb chip cy7c68013 the doc file, using slavefifo way
The-scheme-of-USB-interface
- 本文采用 USB 接口芯片+FPGA+自行设计的 429 总线驱动电路的方案, 完成了 USB-429 总线接口的设计。其中,USB 接口芯片采用 Cypress 公司的 从设备芯片 CY7C68013,实现了与计算机 USB 总线接口的数据通信。FPGA 代替 429 专用协议收发芯片,完成 429 总线数据的格式转换和协议处理,设 计更为灵活,成本更加低廉-The scheme of USB interface chip+ FPGA+ self-designed 429 bu
RIPController
- 基于USB接口的发排卡设计,FPGA + Cy7c68013 + SDRAM-Based USB interface Fapai card design
cy7c68013a_test
- cy7c68013 USB芯片的驱动,采用FPGA读写程序,fpga内部与USB接口的通信-the chip drive cy7c68013 USB FPGA read and write procedures, fpga internal USB interface communication
USBSAMPLE
- 使用VERILOG语言编写的CY7C68013与FPGA程序,FPGA采用ALTREA公司-Use VERILOG language program CY7C68013 and FPGA, FPGA using ALTREA company
USB3-V4
- 这是我自己做的项目,CY7C68013与FPGA中的USB程序,希望站长能通过-This is my own project, CY7C68013 USB and FPGA program in the hope that through the station
CY7C68013andFPGAinterface
- CY7C68013与FPGA接口的Verilog HDL实现-Verilog HDL CY7C68013 and FPGA implementation of the interface
TestProject
- 用fpga + usb ,fpga 用ep3c10e144 , usb 用釙68013日. 使用nios dma 傳輸數據至cy7c68013 , 經usb 到電腦-it use altera cyclone iii ep3c10e144 and cypress cy7c68013a to pc using nios dma to transmit data to pc via cy7c68013
FPGA_CY7C68013_SLAVE_FIFO
- 实现CY7C68013的SLAVE_FIFO高速40M/s的传输,包含FPGA程序和FX2LP程序-CY7C68013 achieve high-speed transmission SLAVE_FIFO 40M/s, including FPGA program and FX2LP program
FX2LP-firmware
- cy7c68013 同步Slave fifo传输 固件。 经测试,速度可以达到每秒40MB以上。 网上很多代码均为异步,速度最多只能到10多MB。注意:因为和FPGA配套,时钟是外部提供,若有不明,可以联系我。-cy7c68013 slave fifo sync transfer firmware. Speed up to 40MB/s.
13_usb_test
- fpga usb2.0 cy7c68013 黑金的板子(fpga usb2.0 cy7c68013)